Techniques for Testing Integrated Circuits

DeBenedictis, 1983

Category: EE

Overall Rating

0.7/5 (5/35 pts)

While the paper offers interesting conceptual abstractions for testing (typed values, hierarchical access via 'inverse filters'), its specific technical framework is deeply tied to the assumptions of early 1980s synchronous digital circuit testing...
...employing a bespoke, feature-limited language (FIFI) and access derivation methods that were quickly superseded by hardware-centric industry standards (scan, JTAG).
Modern tools and methodologies... operate on fundamentally different, more powerful, and standardized principles, rendering this paper's specific contributions obsolete rather than a source of actionable novel paths.

This paper's core concepts—specifically, the formal language for describing tests using abstract "ports" and "typed values" (encoding both value and interaction intent like force, feel, wait) and the notion of hierarchical testing via "access procedures" treated as inverse filter functions (H⁻¹) to achieve controllability and observability of internal "parts"—offer a powerful, yet largely unexplored, framework for interacting with, debugging, and verifying complex, layered systems far beyond integrated circuits.
In modern research, particularly in AI/Machine Learning and complex software systems (like microservices or distributed computing), we face significant challenges in understanding and controlling internal states.
The paper's approach provides this missing piece.

The core idea of the paper is centered around a bespoke test description language, FIFI... This fundamental premise is outdated.
The paper's likely obscurity is justified by the fact that its specific approach, particularly the FIFI language, appears to have been bypassed by more practical and widely adopted methodologies.
A significant technical limitation is the explicit restriction to "non-adaptive tests only" (p. 29) and the lack of general conditionals within the test language.

Ignore