Wiring Considerations in Analog VLSI Systems, with Application to Field-Programmable Networks

Sivilotti, 1991

Category: VLSI

Overall Rating

2.1/5 (15/35 pts)

This thesis articulates an integrated hardware and software vision for rapidly prototyping analog circuits using a field-programmable network, specifically targeting neuromorphic applications.
However, the core concept of a general-purpose programmable analog fabric faces fundamental, unresolved physical challenges related to signal integrity, noise, and variability that severely limit its practical applicability for high-performance analog designs.
While the idea of a platform tailored for specific analog AI primitives remains a less explored niche, the significant technical hurdles and the obsolescence of the detailed implementations and custom tooling make a direct revival of this work impractical for impactful modern research compared to current simulation or custom design approaches.

While the concept of Field-Programmable Analog Arrays (FPAAs) exists today, they are significantly less common and versatile than digital FPGAs.
The novelty lies not just in the programmable fabric, but in the type of analog primitives considered... and the attempt to build a complete system for rapidly prototyping complex analog circuits by electrically configuring these primitives.
The need for low-power, high-speed AI inference has renewed interest in analog computation. Modern tools and methodologies for mixed-signal design could potentially support the development of a sophisticated analog PROTOCHIP.
This thesis offers a blueprint for building a rapid prototyping platform for analog AI computations.

The core paradigm advocated by this thesis...is fundamentally misaligned with the dominant trajectory of VLSI development over the past three decades.
This paper's obscurity is likely due to inherent, unresolved limitations that prevented its core ideas from scaling or achieving practical impact beyond academic research.
Analog signals are highly sensitive to parasitics (resistance, capacitance, inductance), noise coupling, and device matching. A programmable interconnect introduces significant, often variable, parasitic loads and noise paths that fundamentally compromise the precision, linearity, speed, and power consumption of analog circuits compared to custom, fixed wiring.
The reliance on custom NETGEN and NETCMP tools...is a major technical limitation. These tools are isolated from standard industry workflows and data formats, making it impossible to integrate this methodology into current design practices without a prohibitive rewrite.

Ignore